With the development of the semiconductor industry, integrated circuits with higher performances and stronger functions require a larger element density. In addition, the sizes of various components/elements or the spaces between them need to be further reduced. Accordingly, the contact area between the source/drain region and the metal electrode is decreased. As the contact resistivity between the contact surfaces of the conventional source/drain region and the metal electrode is larger, such decreased contact area causes an obvious increase of the contact resistance.
In the prior art, a US patent application US2010/0109046A1 provides a method for decreasing the contact resistance of a source/drain region, so as to solve the above problem and improve the conductivity of the source/drain region. The method comprises the steps of:
performing a pre-decrystallizatoin process on the source/drain region via a contact hole in a manner of ion implantation, so as to form a local amorphous silicon region;
performing a doping ion implantation to the source/drain region using boron;
then plating a layer of metal on an amorphous region at the bottom of the contact hole;
performing an annealing, so that a reaction is caused at the portion of the metal contacting the amorphous silicon to form a metal silicide layer, below which there is residual unreacted amorphous silicon;
next, removing the excess metal which is not siliconized and filling a metal electrode.
Since there is a transition from the amorphous silicon layer to the metal silicide between the source/drain region and the metal electrode, the resistivity between the source/drain region and the metal electrode can be effectively reduced, thereby decreasing the contact resistance.
However, although the above method can decrease the contact resistance of the source/drain region, quite a few defects may be caused by performing the ion implantation and then the annealing during the decrystallizatoin process. For example, when the re-crystallization annealing is ended, the End-of-Range (EOR) defects may occur in a region closely adjacent to a lower region of the recrystallization layer. These EOR defects are generated by crystal defects, and they occur in the decrystallizatoin step while develop in the recrystallization step. These EOR defects seriously deteriorate the electrical properties, especially the carrier mobility of the substrates, and as a result, it is unsuitable to manufacture electronic elements with these substrates. Moreover, in the prior art, the metal silicide is only formed at the bottom of the contact hole, and with the decrease of the device size, a bottom area of the contact hole is reduced, which increases the contact resistance. Therefore, under the tendency that the semiconductor device size becomes smaller, it becomes a problem urgently to be solved to effectively increase the contact area of the semiconductor while reducing the contact resistance.